As you all may recall from some of my previous posts, such as "Confessions of an Ubergeek" and "Brewz.NET", I am looking at building a computer-controlled homebrew system at some point. People before me have done it, most notably Wicked Beer Nut and Arnie Wierenga with HERMAN, however I have seen very few (any?) with a recent windows-based (2000/XP) implementation yet. My efforts thus far are purely academic, as I have since college lost probably 80% of the knowledge I would need to implement such an endeavor, particularly on the electronics and process control side. They must have been the "weak cells" that the beer killed off... ;-)
So, for several weeks I have been refreshing my memory on electronics and circuits, and have started to purchase a bunch of different components to play and experiment with. A batch of 4000 CMOS integrated logic circuits is sitting comfortably downstairs in my brew room, and I have been playing with digital logic simulators to remind myself how they work... I have been reading up on capacitors, transistors, diodes, and all that other good stuff - and even acquired a few PICAXE microcontroller chips and an LCD screen to play with...
You have to learn to crawl before you walk, right? As such, I thought a grant circuit would make a great starter project. I will probably want to use a grant in my system to prevent the pump from creating too much suction on the grain bed, and the same setup could maybe used as a hopback. Basically what you want is:
In principle it is a very simple operation... making it happen electroncally is more involved because electricity doesn't exactly have common sense... you have to build it in. You could go out and spend $99 for a ready-made (and somewhat ugly) solution, fruitlessly try a Google search on how to do such a thing (unless I am the worst Googler on the planet, that info doesn't exist out there), or develop the solution yourself.
So I have boiled down the required logic into two basic tenants, as far as the circuit requirements go:
So what happens if the high level switch is down, but the low level switch is up? Is the pump on or off? One answer is that this state is irrelevant; we don't need to make any change to the pump's on or off state when this combination occurs. If the grant is filling, let it keep filling; if it is emptying, let it continue emptying. The other (and more practical) answer it is both pump states could occur given that combination, and we need to handle it in our circuit design.
If you translate your level switch positions and pump state into a truth table where 0=off and 1=on, A=low level, B=high level, and C=pump state, you end up with the following:
| A | B | C | Comment |
|---|---|---|---|
| 0 | 0 | 0 | Always turn pump off |
| 0 | 1 | 1 | Turn pump on anyways (would never naturally happen, unless low level failed) |
| 1 | 0 | ? | Pump state depends |
| 1 | 1 | 1 | Always turn pump on |
Any way you look at this, the "pump state depends" scenario represents a problem... because for any point in time, the future pump state depends on the current pump state. I'll save you the long-winded solution (ROFL, like this whole post isn't already enough to scratch your eyes out) but you must implement a digital memory element - and you have 3 principle choices: A R/S latch, a J/K flip flop, or a D latch. Below are the logic diagrams for all three (assuming a clocked, or synchronous implementation).
The D-latch logic appears more intuitive, but requires significantly more logic gates on the inputs since it just stores a value, and it requires feedback as an input - The pump state (output) is also part of the decision tree (input) for the next pump state... The pump should be turned on if (1) high is switched, or (2) low is switched AND the pump is already on. In boolean algebra, (B + AC). Using some boolean substitutions, you can also substitute that AND/OR circuit (requiring 1 AND and one OR gate) back to 3 NAND gates, which is what the diagram below shows... AND and OR gates are not very common in digital circuits, and you can get chips that multiple NAND gates on them - so even though it looks more complicated, your circuit uses less components.
The R/S latch and J/K flip flop end up being interchangeable in the logic design due to their set/reset nature, and the input logic is almost trivial: SET the pump on when the high level is switched, and RESET the pump (turn it off) when neither high NOR low are switched.
I will most likely go with the R/S or J/K design, but figured I would show both since I am being a turbonerd anyways.
If you test these circuits using a simulator like Logism, you will find they are functionally equivalent... The pump turns on and off given the same input conditions. I am including links to my logisim files below in case anyone out there wants to play with them, but you will need to download Logism first.
Translating those diagrams into an actual functioning circuit is my next endeavor, but I think I already know how to do it... When I get the working prototype circuit done, I will post some pictures. I am sure you all will be as riveted as I am. :-p
