So I have wired up a simple circuit using some of the 4000 series CMOS chips. After some trial and error, it behaves as expected. Instead of trying to fool with the actual float switches, I substituted in a 8 pin DIP switch, where switch (1) replaces the low level switch, and (2) replaces the upper level switch.
I used a 4047 IC for the clock instead of a 555 timer (I have two available) so I could get a very slow clock frequency - about 1Hz. The yellow LED actually shows the clock's on and off states, and I have read that if you wire a 555 for slow speeds around one sec / cycle, they tend to burn up. The clock circuit (and a 5 volt power supply rig) is on the upper breadboard on the left.
As indicated in my previous post, I went with the J/K design. I ended up using a transistor to serve as the input NOR gate, simply because I didn't really want to devote an entire 14 pin span on my breadboard for a single logic gate - I would only use one of 4. The J/K flip flop is a 4027 Master/Slave with set and reset pins, although I am not using them currently - that's an idea for another post. The 4027 is on the lower breadboard. I am only using one of the 2 J/K flip flops on that chip at the present time - there was no need to use the other, so i is tied to V+.
The output (pin 1) of the 4027 sinks to ground through the green LED to indicate the output state, and also goes up to a switching transistor to power the relay. The relay has a signal diode connected across the relay load to prevent current surges back to the chips.
When the first switch is thrown, nothing happens - as would typically be the case when the grant is filling and the low level switch goes up. When the second switch is thrown (high level), the green LED lights up indicating a "pump on" state and the relay is thrown. Were a pump actually connected to across the relay terminals, that would turn the pump on. When the second switch is thrown back, the light remains on and the relay is open, so the pump would continue to run as the grant empties. When switch 1 (low level) is thrown back, the pump turns off an the relay closes.
So there you go! Simple prototyped grant circuit on a breadboard. Its ugly, but it is functional.
I thought of how this could be incorporated into a computer controlled situation, since that is my ultimate goal with all this tinkering - Of what utility is this circuit for that? Well, for starters, we could easily feed the switch states back to the PC (up or down) and use those to update graphics on the screen, as we could for the pump's ON/OFF state.... Great! But that's not really "computer controlled" is it? So how do we build in functionality to allow the computer to actually override this standard behavior, if we should want?
That's where the "SET" and "RESET" pins of the J/K flip flop would be useful. If you were brave enough to look through the PDF in the link above, you will notice that when SET is high and RESET is low, the flip flop has an output of 1, regardless of the other inputs. Likewise for RESET - if RESET is high and SET is low, then the output is always zero. So, if we actually wire up two additional inputs (C=manual override active, D=manual override state) to the SET and RESET pins, you could theoretically perform a remote override of the pump state from the PC using a couple of digital outputs. The logic diagram looks something like this:
When C=1 and D=0, SET=0 and RESET=1. When C=1 and D=1, then SET=1 and RESET=0. I have shown both the "NOR" logic and the more readable positive logic (AND gates) in the diagram above. The SET and RESET input logic can be simplified down to a single 4001 Quad NOR gate chip - the logic diagram below is equivalent to the above, and if you drill down on the ICs you'll find the logic subcircuits.
I haven not bothered prototyping this setup because I am confident it could work, and I think there is an even better option to be explored - use of a PICAXE microcontroller chip. We will see if that is true when I get the PICAXE circuit functional.
